Communication system receivers frequently operate in the presence of intersymbol interference and additive noise. One example is simulcast communications systems, which employ a plurality of transmitters (base stations) that simultaneously transmit an identical message to a mobile receiver, which can result in the reception of two or more signals that typically are not in time alignment. That is, the propagation delays from the transmitters are typically unequal, giving rise to intersymbol interference.
Independent of the intersymbol interference caused by simulcast transmission, intersymbol interference can also be caused by multipath propagation. Multipath propagation arises from multiple reflections of signals from buildings or other objects and can lead to intersymbol interference if the delay spread of its received signals is significant compared to the symbol duration. Multipath propagation also causes signal fading which occurs as a mobile receiver travels through the interference pattern that results from the superposition of multiple signals.
Further, in simulcast systems, although substantial effort is devoted to ensuring that the transmitters operate at identical frequencies and are synchronized with one another, some mismatches still exist. These mismatches result in additional signal degradation. For example, some simulcast transmitters in current commercial operation maintain the timing error between base stations to within .+-.10 microseconds. Consequently, a receiver that is located in an overlap region encounters a worst-case RF signal delay on the order of 20 microseconds, (due to base station timing error) plus roughly 50 microseconds (due to the propagation time differences).
The earliest approach to deal with the relative delay between multiple receive signals was simply to restrict the system signaling rate. In the referenced example of a simulcast system with a worst case delay spread of 70 microseconds, in the past, the signaling rate has been restricted to approximately 3500 baud. This restriction kept the delay spread to less than 1/4 symbol, as a crude "rule of thumb."
More recently, the signaling rate has been increased, with the intersymbol interference being handled by adaptive equalization techniques. Various adaptive equalizers exist, including Decision Feedback Equalizers (DFEs) and Maximum Likelihood Sequence Estimators (MLSEs). U.S. Pat. No. 5,353,307, and other publications disclose adaptive equalizers for simulcast receivers that employ Lattice-DFE and Kalman-DFE techniques. Hybrid arrangements that combine various equalization techniques have also been proposed.
In general, each prior adaptive equalization proposal exhibits both advantages and drawbacks. For example, DFE arrangements are advantageous in that they exhibit low computational complexity, but are disadvantageous because of an undesirably high bit error rate (BER). In contrast, the BER of MLSE arrangements can be low, but at the cost of a large computational complexity, which grows exponentially as a function of channel memory length (i.e., the number of significant taps in the channel impulse response).
To increase the effectiveness of equalization, communication systems have been developed in which a periodically transmitted sequence of reference (training) symbols is interspersed with data symbol sequences. The sequence of training symbols is known to the receiver and is utilized to update the equalizer taps. More specifically, the training symbols are used to update the equalizer taps so that the correspondence between the equalizer and the channel impulse response is accurate to the degree possible with the particular equalizer memory length.
The use of training symbols can serve to make equalizer tracking more robust to fading. However, there is a cost in terms of loss of data transmission capacity, since time and signal energy are expended to transmit the training sequences. Consequently, there is a trade-off between the cost of providing training symbols and their benefit of improving the tracking ability of the equalizer.
Bidirectional equalization techniques have been proposed that serve to improve equalizer performance, given any particular amount of training symbol overhead. In bidirectional equalization, the symbol processing is carried out in the normal temporal sequence (forward equalization), and in reverse time order (reverse equalization). The forward and reverse equalizers may both process an entire block of data symbols, or only mutually exclusive portions. In the former case, various approaches have been used for the selection of the forward or reverse equalizer signals, including selection on a symbol-by-symbol basis, and selection of either the forward or reverse equalizer signals for an entire data block.
One prior art bidirectional DFE arrangement is disclosed in "A Soft-Output Bidirectional Decision Feedback Equalization Technique for TDMA Cellular Radio," which is authored by Liu et al., and was published in IEEE Journal on Selected Areas in Communications, Vol. 11, No. 7 (September 1993). In the equalization process disclosed by Liu et al., equalization in the forward and reverse directions are used to identify the onset of a deep signal fade with respect to each processing direction. When a deep fade is identified in either direction, equalization in that direction ceases and processing is initiated in the opposite direction until a deep fade is again identified. With respect to data time slots in which a single deep fade occurs, the process of Liu et al. thus provides relatively reliable equalization for all received symbols, except those received during the deep fade period. To minimize equalization errors during the deep fade period, the arrangement of Liu et al. uses forward equalization for the first half of the detected deep fade, and uses reverse equalization for the second half of the deep fade period.
U.S. Pat. No. 5,274,670, which issued to Serizawa et al. on Dec. 28, 1993, discloses bidirectional DFE arrangements which utilize "evaluation functions" that are intended to estimate the reliability of the forward and reverse equalizers. In one arrangement of Serizawa et al., the forward evaluation function is a lowpass filtered version of a correlation of the signal sequence with a sequence produced by the forward equalizer. The evaluation function for the reverse equalization is similarly obtained using the output of the reverse equalizer. The output of this arrangement is produced by a bit-by-bit comparison of the forward and reverse evaluation functions with the data symbol exhibiting the highest correlation value being included in the output sequence.
Additional bidirectional DFE arrangements that are proposed by Serizawa et al., include modifications of the evaluation functions to attempt to increase the accuracy of the reliability estimate. Such modifications include multiplication or addition of "correction" functions, which bias the reliability estimates to be stronger for those bits nearest the training bits. In yet another proposal of Serizawa et al., equalization switches from forward equalization to reverse equalization when the sum of absolute values of the DFE feed forward taps drops below a predetermined, near-zero value.
U.S. Pat. No. 5,513,215, which issued to Marchetto et al. is entitled "HIGH SPEED SIMULCAST DATA SYSTEM USING ADAPTIVE COMPENSATION," and is assigned to the assignee of this application, discloses a two-stage equalizer that is driven by a channel impulse response estimator. The first equalizer stage is a bidirectional DFE. The forward and reverse DFE outputs are provided as inputs to a Viterbi equalizer as tentative data sequence estimates. In effect, the Viterbi equalizer is thus constrained to consider all sequences that are made up of different combinations of the forward and reverse DFE output signals. Constraining the Viterbi equalizer in this manner dramatically reduces the prohibitive computational effort of an unconstrained Viterbi equalizer.
In many situations, the currently proposed bidirectional DFE arrangements provide satisfactory BER performance. Although the arrangement disclosed in the above-referenced U.S. patent application of Marchetto et al. provides significant performance improvement over prior art equalization techniques, the use of the constrained Viterbi equalizer can result in computational complexity that is undesirable or, in some situations, prohibitive. For example, one realization of the constrained Viterbi equalizer proposed by Marchetto et al. exhibits a peak complexity of approximately 76 million instructions per second (MIPS), which accounts for approximately 70% of the peak computational work-load of the complete receiving system. Moreover, the peak workload required by the Marchetto et al. bidirectional DFE increases exponentially with the symbol rate.
The arrangement disclosed in the above-referenced patent of Serizawa et al. can be simpler than the method of Marchetto et al. However, the computation of each evaluation function is still rather complex, primarily since it involves a correlation computation (of length on the order of the number of equalizer taps).